? semiconductor components industries, llc, 2010 august, 2010 ? rev. 9 1 publication order number: mje13005/d MJE13005G switchmode series npn silicon power transistors these devices are designed for high ? voltage, high ? speed power switching inductive circuits where fall time is critical. they are particularly suited for 115 and 220 v switchmode applications such as switching regulator?s, inverters, motor controls, solenoid/relay drivers and deflection circuits. features ? v ceo(sus) 400 v ? reverse bias soa with inductive loads @ t c = 100 c ? inductive switching matrix 2 to 4 a, 25 and 100 c t c @ 3a, 100 c is 180 ns (typ) ? 700 v blocking capability ? soa and switching applications information ? these devices are pb ? free and are rohs compliant* maximum ratings rating symbol value unit collector ? emitter voltage v ceo(sus) 400 vdc collector ? emitter voltage v cev 700 vdc emitter ? base voltage v ebo 9 vdc collector current ? continuous ? peak (note 1) i c i cm 4 8 adc base current ? continuous ? peak (note 1) i b i bm 2 4 adc emitter current ? continuous ? peak (note 1) i e i em 6 12 adc total device dissipation @ t a = 25 c derate above 25 c p d 2 0.016 w w/ c total device dissipation @ t c = 25 c derate above 25 c p d 75 0.6 w w/ c operating and storage junction temperature range t j , t stg ? 65 to +150 c thermal characteristics characteristics symbol max unit thermal resistance, junction ? to ? ambient r ja 62.5 c/w thermal resistance, junction ? to ? case r jc 1.67 c/w maximum lead temperature for soldering purposes 1/8 from case for 5 seconds t l 275 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. pulse test: pulse width = 5 ms, duty cycle 10%. *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. 4 ampere npn silicon power transistor 400 volts ? 75 watts to ? 220ab case 221a ? 09 style 1 1 http://onsemi.com marking diagram 2 3 MJE13005G ay ww a = assembly location y = year ww = work week g = pb ? free package device package shipping ordering information MJE13005G to ? 220 (pb ? free) 50 units / rail
MJE13005G http://onsemi.com 2 ????????????????????????????????? ????????????????????????????????? (t c = 25 c unless otherwise noted) ???????????????????? ???????????????????? characteristic ???? ???? ???? ???? ??? ??? ???? ???? ??? ??? ????????????????????????????????? ????????????????????????????????? (note 2) ???????????????????? ???????????????????? ???????????????????? ? emitter sustaining voltage (i c = 10 ma, i b = 0) ???? ???? ???? ???? ???? ???? ??? ??? ??? ? ???? ???? ???? ??? ??? ??? vdc ???????????????????? ???????????????????? ???????????????????? c) ???? ???? ???? ???? ???? ???? ? ? ??? ??? ??? ???? ???? ???? 1 5 ??? ??? ??? ???????????????????? ???????????????????? ???????????????????? ???? ???? ???? ???? ???? ???? ? ??? ??? ??? ???? ???? ???? 1 ??? ??? ??? ????????????????????????????????? ????????????????????????????????? second breakdown ???????????????????? ???????????????????? second breakdown collector current with base forward biased ???? ???? ???? ???? ? ???????? ???????? see figure 11 ???????????????????? ???????????????????? ???? ???? ???? ???? ? ???????? ???????? see figure 12 ????????????????????????????????? ????????????????????????????????? on characteristics (note 2) ???????????????????? ???????????????????? ???????????????????? ???? ???? ???? ???? ???? ???? ??? ??? ??? ? ? ???? ???? ???? 60 40 ??? ??? ??? ? ???????????????????? ???????????????????? ???????????????????? ???????????????????? ???????????????????? collector ? emitter saturation voltage (i c = 1 adc, i b = 0.2 adc) (i c = 2 adc, i b = 0.5 adc) (i c = 4 adc, i b = 1 adc) (i c = 2 adc, i b = 0.5 adc, t c = 100 c) ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ? ? ? ? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? 0.5 0.6 1 1 ??? ??? ??? ??? ??? ???????????????????? ???????????????????? ???????????????????? ???????????????????? ? emitter saturation voltage (i c = 1 adc, i b = 0.2 adc) (i c = 2 adc, i b = 0.5 adc) (i c = 2 adc, i b = 0.5 adc, t c = 100 c) ???? ???? ???? ???? ???? ???? ???? ???? ? ? ? ??? ??? ??? ??? ???? ???? ???? ???? 1.2 1.6 1.5 ??? ??? ??? ??? ????????????????????????????????? ????????????????????????????????? dynamic characteristics ???????????????????? ???????????????????? ???????????????????? current ? gain ? bandwidth product (i c = 500 madc, v ce = 10 vdc, f = 1 mhz) ???? ???? ???? ???? ???? ???? ??? ??? ??? ? ???? ???? ???? ??? ??? ??? mhz ???????????????????? ???????????????????? ???? ???? ???? ???? ? ??? ??? 65 ???? ???? ? ??? ??? pf ????????????????????????????????? ????????????????????????????????? switching characteristics ????????????????????????????????? ????????????????????????????????? (table 2) ???????? ???????? ????????????? ????????????? ????????????? ????????????? ????????????? s, duty cycle 1%) ???? ???? ???? ???? ? ??? ??? 0.025 ???? ???? ??? ??? s ???????? ???????? ???? ???? ???? ???? ? ??? ??? 0.3 ???? ???? ??? ??? s ???????? ???????? ???? ???? ???? ???? ? ??? ??? 1.7 ???? ???? ??? ??? s ???????? ???????? ???? ???? ???? ???? ? ??? ??? 0.4 ???? ???? ??? ??? s ????????????????????????????????? ????????????????????????????????? inductive load, clamped (table 2, figure 13) ???????? ???????? ????????????? ????????????? ????????????? ????????????? c) ???? ???? ???? ???? ? ??? ??? 0.9 ???? ???? ??? ??? s ???????? ???????? ???? ???? ???? ???? ? ??? ??? 0.32 ???? ???? ??? ??? s ???????? ???????? ???? ???? ???? ???? ? ??? ??? 0.16 ???? ???? ? ??? ??? s 2. pulse test: pulse width = 300 s, duty cycle = 2%.
MJE13005G http://onsemi.com 3 c, capacitance (pf) v ce(sat) , collector-emitter saturation voltage (volts) v be , base-emitter voltage (volts) v ce , collector-emitter voltage (volts ) i c , collector current (amp) i c , collector current (amp) 1.1 1.3 0.7 0.3 figure 1. dc current gain i c , collector current (amp) 0.1 0.4 2 4 10 figure 2. collector saturation region 0.03 i b , base current (amp) 0.3 0.05 1.2 0.4 0 100 h fe , dc current gain 0.1 0.2 0.5 3 figure 3. base ? emitter voltage figure 4. collector ? emitter saturation voltage figure 5. collector cutoff region 2 0.8 0.1 v be , base-emitter voltage (volts) 0 t j = 25 c 0.2 1 figure 6. capacitance 2 k v r , reverse voltage (volts) c ib c ob 0.3 , collector current (a) i c -0.4 -0.2 70 50 300 1.6 0.5 i c = 1 a t j = -55 c 5 0.04 0.6 0.06 0.1 1 0.04 0.4 0.2 0.6 70 50 30 7 300 200 100 20 30 100 50 5 1 0.5 150 c i c /i b = 4 +0.6 2 a 0.7 1 2 0.9 0.35 0.55 0.25 0.05 0.45 0.06 v ce = 2 v v ce = 5 v t j = 150 c 25 c -55 c 2 0.15 +0.4 +0.2 1 10 100 1 k 10 k 500 700 1 k 10 30 reverse forward v ce = 250 v v be(sat) @ i c /i b = 4 v be(on) @ v ce = 2 v 20 3 a 4 a 4 25 c 25 c 0.06 0.1 1 0.04 0.4 0.2 0.6 2 4 3 t j = -55 c 25 c 150 c t j = 150 c 125 c 100 c 75 c 50 c 25 c
MJE13005G http://onsemi.com 4 t rv time i c v ce 90% i b1 t sv i cpk v clamp 90% v clamp 90% i c 10% v clamp 10% i cpk 2% i c i b t fi t ti t c figure 7. inductive switching measurements table 1. typical inductive switching performance ???? ???? ???? ??? ??? ??? c ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? 2 ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? switching times note in resistive switching circuits, rise, fall, and storage times have been defined and apply to both current and voltage waveforms since they are in phase. however, for inductive loads which are common to switchmode power supplies and hammer drivers, current and voltage waveforms are not in phase. therefore, separate measurements must be made on each waveform to determine the total switching time. for this reason, the following new terms have been defined. t sv = voltage storage time, 90% i b1 to 10% v clamp t rv = voltage rise time, 10 ? 90% v clamp t fi = current fall time, 90 ? 10% i c t ti = current tail, 10 ? 2% i c t c = crossover time, 10% v clamp to 10% i c an enlarged portion of the inductive switching waveforms is shown in figure 7 to aid in the visual identity of these terms. for the designer, there is minimal switching loss during storage time and the predominant switching power losses occur during the crossover interval and can be obtained using the standard equation from an ? 222: p swt = 1/2 v cc i c (t c )f in general, t rv + t fi t c . however, at lower test currents this relationship may not be valid. as is common with most switching transistors, resistive switching is specified at 25 c and has become a benchmark for designers. however, for designers of high frequency converter circuits, the user oriented specifications which make this a ?switchmode? transistor are the inductive switching speeds (t c and t sv ) which are guaranteed at 100 c. t, time (s) t, time (s) figure 8. turn ? on time i c , collector current (amp) t r t d @ v be(off) = 5 v 0.02 0.01 1 0.5 0.2 i c , collector current (amp) 0.4 4 12 0.04 v cc = 125 v i c /i b = 5 t j = 25 c 0.2 0.05 0.1 0.1 figure 9. turn ? off time 0.2 0.1 10 5 1 0.5 4 12 0.04 v cc = 125 v i c /i b = 5 t j = 25 c 0.2 0.3 0.5 0.1 2 t s t f resistive switching performance
MJE13005G http://onsemi.com 5 reverse bias safe operating area and inductive switching resistive switching output waveforms test circuits circuit values test waveforms note pw and v cc adjusted for desired i c r b adjusted for desired i b1 5 v p w duty cycle 10% t r , t f 10 ns 68 1 k 0.001 f 0.02 f 1n493 3 270 +5 v 1 k 2n2905 47 1/2 w 100 -v be(off) mje200 t.u.t. i b r b 1n4933 1n4933 33 33 2n222 2 1 k mje210 v cc +5 v l i c mr826* v clamp *selected for 1 kv v ce 5.1 k 51 +125 v r c scope -4.0 v d1 r b tut t 1 adjusted to obtain i c t 1 l coil (i c pk ) v cc t 2 l coil (i c pk ) v clamp +10 v 25 s 0 -8 v coil data: ferroxcube core #6656 full bobbin (~16 turns) #16 gap for 200 h/20 a l coil = 200 h v cc = 20 v v clamp = 300 vdc v cc = 125 v r c = 62 d1 = 1n5820 or equiv. r b = 22 test equipment scope ? tektronics 475 or equivalent t r , t f < 10 ns duty cycle = 1.0% r b and r c adjusted for desired i b and i c t 1 i c v ce time i c(pk) v ce or v clamp t 2 t t t f t f clamped t f unclamped t 2 table 2. test conditions for dynamic performance t, time (ms) 1 0.01 0.01 0.7 0.2 0.1 0.05 0.02 r(t), transient thermal resistance 0.05 1 2 5 10 20 50 100 200 500 z jc(t) = r(t) r jc r jc = 1.67 c/w max d curves apply for power pulse train shown read time at t 1 t j(pk) - t c = p (pk) z jc(t) p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 d = 0.5 0.2 0.05 0.01 single pulse 0.1 0.5 0.2 (normalized) 1 k 0.5 0.3 0.07 0.03 0.02 figure 10. typical thermal response [z jc (t)] 0.1 0.02
MJE13005G http://onsemi.com 6 safe operating area information the safe operating area figures 11 and 12 are specified ratings for these devices under the test conditions shown. i c(pk) , collector current (amp) i c , collector current (amp) 5 ms 500 s 1 ms dc 10 7 v ce , collector-emitter voltage (volts) 0.02 10 400 2 1 5 0.5 0.1 0.05 30 50 70 100 figure 11. forward bias safe operating area figure 12. reverse bias switching safe operating area 0.2 0.01 300 500 mje13005 520 4 0 800 1 100 300 t c 100 c i b1 = 2.0 a 500 700 v be(off) = 9 v 0 2 v ce , collector-emitter clamp voltage (volts) 3 200 400 600 5 v mje13005 3 v 200 1.5 v forward bias there are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. safe operating area curves indicate i c ? v ce limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. the data of figure 11 is based on t c = 25 c; t j(pk) is variable depending on power level. second breakdown pulse limits are valid for duty cycles to 10% but must be derated when t c 25 c. second breakdown limitations do not derate the same as thermal limitations. allowable current at the voltages shown on figure 11 may be found at any case temperature by using the appropriate curve on figure 13. t j(pk) may be calculated from the data in figure 10. at high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. reverse bias for inductive loads, high voltage and high current must be sustained simultaneously during turn ? off, in most cases, with the base to emitter junction reverse biased. under these conditions the collector voltage must be held to a safe level at or below a specific value of collector current. this can be accomplished by several means such as active clamping, rc snubbing, load line shaping, etc. the safe level for these devices is specified as reverse bias safe operating area and represents the voltage ? current conditions during reverse biased turn ? off. this rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. figure 12 gives the complete rbsoa characteristics. figure 13. forward bias power derating t c , case temperature ( c) 0 40 120 160 0.6 power derating factor second breakdown derating 1 0.8 0.4 0.2 60 100 140 80 thermal derating 20
MJE13005G http://onsemi.com 7 package dimensions to ? 220ab case 221a ? 09 issue af style 1: pin 1. base 2. collector 3. emitter 4. collector notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension z defines a zone where all body and lead irregularities are allowed. dim min max min max millimeters inches a 0.570 0.620 14.48 15.75 b 0.380 0.405 9.66 10.28 c 0.160 0.190 4.07 4.82 d 0.025 0.035 0.64 0.88 f 0.142 0.161 3.61 4.09 g 0.095 0.105 2.42 2.66 h 0.110 0.155 2.80 3.93 j 0.014 0.025 0.36 0.64 k 0.500 0.562 12.70 14.27 l 0.045 0.060 1.15 1.52 n 0.190 0.210 4.83 5.33 q 0.100 0.120 2.54 3.04 r 0.080 0.110 2.04 2.79 s 0.045 0.055 1.15 1.39 t 0.235 0.255 5.97 6.47 u 0.000 0.050 0.00 1.27 v 0.045 --- 1.15 --- z --- 0.080 --- 2.04 b q h z l v g n a k f 123 4 d seating plane ? t ? c s t u r j on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. mje13005/d switchmode is a trademark of semiconductor components industries, llc. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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